A conventional current mirror circuit includes a first FET (Field Effect Transistor) into which a current is inputted, a second FET which outputs the current and a third FET which is connected to the second FET in series. The drain electrode of the first FET and the gate electrode of the first FET are short-circuited. The gate electrode of the second FET is connected to the gate electrode of the first FET. A bias voltage which is the same as the bias voltages of the first and second FETs is provided to the gate electrode of the third FET.
The conventional current mirror circuit has a problem in that the gate voltage of the second FET changes due to a parasitic capacitance between the drain electrode of the third FET and the gate electrode of the third FET when the output voltage is changed, therefore the output current changes in accordance with the change of the gate voltage of the second FET.
In order to solve the problem, it is necessary that an electric charge stored in a parasitic capacitance between the drain electrode of the third FET and the gate electrode of the third FET by the change of the output voltage is discharged outside.
The conventional current mirror circuit has also a problem in that the output current shifts from a designed value, and accuracy falls because of the difference between the operating voltage of the first FET and the operating voltage of the second FET,
In contrast, a current mirror circuit which suppresses an error of the output current depending on the output voltage has been known. Such kind of current mirror circuit is disclosed in Japanese Patent Application Publication No. 9-232881.
The current mirror circuit includes first, second, third, and fourth FETs. The gate electrodes of the first and second FETs are connected to each other. The source electrode of the third FET is connected to the drain electrode of the first FET, the drain electrode of the third FET and the gate electrode of the third FET are connected to each other, and to a current input terminal. The source electrode of the fourth FET is connected to the drain electrode of the second FET, the gate electrode of the fourth FET is connected to the gate electrode of the third FET, and the drain electrode of the fourth FET becomes a current output terminal.
Furthermore, the source electrodes of the first and second FETs are connected to each other, and to a negative side power supply terminal. The current mirror circuit also includes a resistor, a level shift circuit, a fifth FET and a current source. One end of the resistor is connected to the source electrode of the first FET, and another end of the resistor is connected to the gate electrode of the first FET. The low potential side of the level shift circuit is connected to the gate electrode of the first FET. The source electrode of the fifth FET is connected to the high potential side of the level shift circuit, the gate electrode of the fifth FET is connected to the gate electrode of the third FET, and the drain electrode of the fifth FET is connected to a positive side power supply terminal. The current source is connected between the positive side power supply terminal and the current input terminal.
However, the current mirror circuit is suppressing the deviation of the output current to the steady shift of the output voltage, and provides neither any disclosure nor suggestion about the transient change of the output voltage. Since the current mirror circuit has the resistor, power consumption increases, and there is a problem of causing increase of circuit area.